MEMORY
Some parallel-interface TFT modules include a soldered SPI flash memory device or provide pads for adding one. This feature is uncommon on SPI-based TFT modules. When required, a separate SPI flash memory device can be integrated into the PCB design, similar to adding an external SD card slot.
For best performance and simplicity, it is recommended to use a dedicated hardware SPI bus - preferably a secondary SPI module separate from the TFT display. Sharing an SPI bus with the TFT does not significantly impact memory access speed, however simultaneous transfer between the TFT module and the memory will greatly reduce the speed. Software SPI may also be used, with best results achieved when separate signal lines from the TFT module are assigned. Sharing lines with the TFT typically has only a minimal effect on memory performance but greatly reduces TFT speed when both are accessed at the same time.
Recommended design: Let the memory IC and SD card share separate, either hardware or software SPI lines, from the TFT module.
Why might we want to include external memory in our design?
Memory can be used to store BMP image files that the system may need to display. For example, if the user wants a visually appealing screen menu with shadowed, rounded, or transparent buttons, these elements can be created as separate BMP files and rendered at the appropriate positions.
Memory can also be used to save screen captures for later display. This is useful when dealing with dynamic content, such as real-time temperature, speed, or other changing data, where the user may want to save a full or partial screenshot.
Compared to SD cards, external memory offers faster read speeds and greater reliability. Users can transfer BMP files from an SD card into memory for later use. Once stored, the files remain in memory until it is explicitly formatted. Details on how this works are provided in the memory-related commands.
Including memory IC in the design is optional, and if used, it can come in various sizes depending on the application requirements.
Note: Currently, only SPI FLASH memory is supported. Larger EEPROM devices (greater than 1 MB) often differ in architecture and are therefore not supported at this time. Support for SPI EEPROM devices may be added in a future release. If a memory IC is present but not used, ensure that its CS pin is held high.

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