Software SPI
The Software SPI protocol (SW SPI), also known as Bit-banging, is slower than the Hardware SPI protocol (HW SPI) but offers flexibility by allowing any available pins to be used, while still providing sufficient speed for most graphic applications.
Important Note! Although the TFT display can share SW SPI with other peripherals, using a shared setup will significantly reduce effective transfer rates compared to using dedicated SW SPI pins for the display. This is because there are two primary ways to transfer pixel data to display chips:
Mode 1: An area of X * Y pixels on the screen is designated to be filled, and all required pixels (totaling X * Y) are sent sequentially as RGB data, without any additional overhead. In this mode, data transfer cannot be interrupted; keeping Chip Select (CS) low continuously means that any communication on the shared port will be interpreted as graphic data by the display IC. Thus, this mode isn’t suitable for shared SW SPI pins.
Mode 2: Individual pixels are sent with both RGB data and coordinate information, which requires additional commands for each pixel. Because each pixel’s position is specified, graphic data transfer can be paused and resumed, allowing the SW SPI pins to be shared. However, this mode incurs significant data overhead and a speed penalty.
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$define TFT_COM SPI_SW |
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